Join Northrop Grumman – Beavercreek, part of Mission Systems sector, focused on the development of new capabilities for our military and intelligence customers around the globe. Our Northrop Grumman Beavercreek, Ohio small business culture operates collaboratively within a larger corporation providing the benefits of both.  This unique relationship offers employees the ability to know everyone at the site while working on technologies and products that are beyond state-of-the-art. You and your team will wrestle with the next big problems in an atmosphere of collaboration and cooperation, sharing your expertise while learning from the expert next to you. Remember when you were excited about getting to work because the challenge of the problem, the importance of the solution and the fun you had with your team?  It's that kind of place!  But don’t take my word for it.  See for yourself!  See why we receive comments on our YouTube Videos like “This company is insanely advanced” and “Wow. This is mind blowing.”  See some of our recent Awards and Recognition.

We are looking for you to join our team as a Navigation Warfare (NavWar) FPGA Digital Engineer based out of Beavercreek, OH. Engineers here are part of multi-disciplinary program teams implementing next-generation, position, navigation, and timing products critical to US customers and allies. Team members conduct all phases of these programs, including requirements generation, hardware-selection, software development, and system integration and test. We are seeking engineers with the desire to learn new technologies to join our innovative organization to help develop, enhance and maintain FPGA designs on cutting edge products and systems.

The ideal candidate will have experience with:

• FPGA coding, embedded software, and hardware debug
• Full FPGA design flow
• FPGA integration into custom hardware
• FPGA debugging, timing analysis, and optimization techniques
• VHDL

Experience you will gain:

• Developing and evaluating A/J (Anti-Jam), GPS Denied environment technologies
• Analyzing GPS navigation performance in laboratory and flight test scenarios
• Communicating status, issues, and results with program management and customers
• Working in close collaboration with Government R&D organizations such as AFRL, ONR, DARPA, and/or Army labs to develop advanced navigation and timing technologies
• Working with a team of navigation and timing engineers in a team-based collaborative environment dedicated to advancing the state of the art
• Applying research and development skills to create real-world products and capabilities well beyond purely academic or theoretical
• Working with leading-edge Software Defined Radio (SDR) systems for GPS, GNSS, and other cooperative signals along with advanced signal processing techniques to define new product lines
• Characterizing DSP (Digital Signal Processing) in relevant environments
• Working with leading-edge NAVWAR systems, techniques, algorithms, and software to enhance mission success in contested environments

Are you seeking a challenging role with a strong team? Come define possible with us in Beavercreek!

This role can be filled as an Associate FPGA Digital Engineer or FPGA Digital Engineer

This role is contingent on obtaining Interim Secret clearance or higher prior to start date.

Basic Qualifications for Associate FPGA Digital Engineer (T01):

• Completed Bachelors of Science degree in a STEM field (Science, Technology, Engineering, Math) with 0 years of experience
• Experience with FPGA device(s)
• VHDL or Verilog proficiency is required.
• US Citizenship is required
• The ability to obtain and maintain a Top Secret clearance (NG will sponsor)
• Clearance: Candidate must have or be able to obtain an Interim Secret clearance or higher prior to start date

Basic Qualifications for FPGA Digital Engineer (T02):

• Completed Bachelors of Science degree in a STEM field (Science, Technology, Engineering, Math) with 2 years of experience; or Master’s degree in a STEM field with 0 years of experience
• Experience with FPGA device(s)
• VHDL or Verilog proficiency is required.
• US Citizenship is required
• The ability to obtain and maintain a Top Secret clearance (NG will sponsor)
• Clearance: Candidate must have or be able to obtain an Interim Secret clearance or higher prior to start date

Preferred Qualifications:

• Experience on cross discipline teams
• Experience with AMD/Xilinx Versal, Ultrascale, or Zynq families of devices
• Experience with Electronic Design Automation (EDA) Tools: Vivado, Xcelium
• Experience with scripting languages (Tcl, Bash, Python)
• Experience simulating VHDL designs, ModelSim, QuestaSim or comparable simulators
• Experience with board or system level debug using test equipment such as oscilloscopes and logic analyzers.
• Experience with MATLAB
• Experience with software-defined radios
• Familiarity with RADAR, GPS, and/or EW signals
• Knowledge of digital signal processing
• Experience using software management and workflow automation tools such as ClearCase, Git, ClearQuest, or Jira
• Active Top Secret security clearance with SCI